1. Field of the Invention
This invention relates to a nitride semiconductor device, and more particularly to a nitride semiconductor device having a heterojunction field-effect transistor structure.
2. Background Art
Power semiconductor devices capable of high power control such as heterojunction field-effect transistors (HFETs) are expected to be used for switching power supply circuits and power control circuits. High breakdown voltage and low ON resistance are required of power semiconductor devices. Breakdown voltage and ON resistance depend on the device material and are in a tradeoff relationship. With the progress of technology development, power semiconductor devices have achieved low ON resistance close to the limit of silicon (Si), which is a major device material. Further reduction of ON resistance requires a new device material. For example, nitride semiconductors such as gallium nitride (GaN) and aluminum gallium nitride (AlGaN) and wide bandgap semiconductors such as silicon carbide (SiC) can be used for the material of switching devices to improve the tradeoff that depends on the device material, enabling ON resistance to be dramatically reduced.
An HFET device is formed by crystal growth of AlGaN or GaN on a support substrate made of SiC, silicon (Si), or GaN. The chip cost can be reduced because the n+-SiC substrate and Si substrate are generally less expensive than the GaN substrate.
However, in a lateral HFET formed on such a conductive support substrate, a voltage is applied also between the support substrate and the drain electrode. That is, a voltage is applied also vertically. In heteroepitaxy, where the support substrate is different in material from the crystal growth layer formed thereon, crystal defects are likely to occur in the vicinity of this interface. Hence, a voltage applied to a portion having crystal defects causes a problem of decreased breakdown voltage due to the occurrence of leak current and the decrease of breakdown electric field strength.
On the other hand, JP 2004-047764A discloses a manufacturing method, where an Si-doped GaN buffer layer with a high Si concentration of 4×1019 cm−3 or more is epitaxially grown on a single crystal insulative substrate, and a nitride semiconductor layer having a single crystal structure is formed on the Si-doped GaN buffer layer by epitaxial growth.